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To all our customers
Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp.
The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.) Accordingly, although Mitsubishi Electric, Mitsubishi Electric Corporation, Mitsubishi Semiconductors, and other Mitsubishi brand names are mentioned in the document, these names have in fact all been changed to Renesas Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been made to the contents of the document, and these changes do not constitute any alteration to the contents of the document itself. Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices and power devices.
Renesas Technology Corp. Customer Support Dept. April 1, 2003
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
DESCRIPTION
The M37733M4BXXXFP is a single-chip microcomputer using the 7700 Family core. This single-chip microcomputer has a CPU and a bus interface unit. The CPU is a 16-bit parallel processor that can be an 8-bit parallel processor, and the bus interface unit enhances the memory access efficiency to execute instructions fast. This microcomputer also includes a 32 kHz oscillation circuit, in addition to the ROM, RAM, multiple-function timers, serial I/O, A-D converter, and so on.
qSerial I/O (UART or clock synchronous) ..................................... 3 q10-bit A-D converter ............................................ 8-channel inputs q12-bit watchdog timer qProgrammable input/output (ports P0, P1, P2, P3, P4, P5, P6, P7, P8) ............................... 68 qClock generating circuit ........................................ 2 circuits built-in
APPLICATION
Control devices for general commercial equipment such as office automation, office equipment, and so on. Control devices for general industrial equipment such as communication equipment, and so on.
FEATURES
qNumber of basic instructions .................................................. 103 qMemory size ROM ................................................. 32 Kbytes RAM ................................................ 2048 bytes qInstruction execution time The fastest instruction at 25 MHz frequency ...................... 160 ns qSingle power supply ...................................................... 5 V 10% qLow power dissipation (at 25 MHz frequency) ............................................47.5 mW (Typ.) qInterrupts ............................................................ 19 types, 7 levels qMultiple-function 16-bit timer ................................................. 5 + 3
PIN CONFIGURATION (TOP VIEW)
P84/CTS1/RTS1 P85/CLK1 P86/RXD1 P87/TXD1 P00/A0 P01/A1 P02/A2 P03/A3 P04/A4 P05/A5 P06/A6 P07/A7 P10/A8/D8 P11/A9/D9 P12/A10/D10 P13/A11/D11 P14/A12/D12 P15/A13/D13 P16/A14/D14 P17/A15/D15 P20/A16/D0 P21/A17/D1 P22/A18/D2 P23/A19/D3
64 62 59 53 60 57 61 58 49 48 47 46 42 56 50 54 63 52
P83/TXD0 P82/RXD0/CLKS0 P81/CLK0 P80/CTS0/RTS0/CLKS1 VCC AVCC VREF AVSS VSS P77/AN7/XcIN P76/AN6/XcOUT P75/AN5/ADTRG/TxD2 P74/AN4/RxD2 P73/AN3/CLK2 P72/AN2/CTS2 P71/AN1
55
51
45
44
43
41
65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 21 10 11 12 15 16 14 17 18 20 13 19 22 23 24
40 39 38 37 36 35 34
M37733M4BXXXFP
33 32 31 30 29 28 27 26 25
P24/A20/D4 P25/A21/D5 P26/A22/D6 P27/A23/D7 P30/R/W P31/BHE P32/ALE P33/HLDA Vss
E
XOUT XIN
RESET
CNVSS BYTE P40/HOLD
3
4
1
2
P70/AN0 P67/TB2IN/SUB P66/TB1IN P65/TB0IN P64/INT2 P63/INT1 P62/INT0 P61/TA4IN P60/TA4OUT P57/TA3IN/KI3 P56/TA3OUT/KI2 P55/TA2IN/KI1 P54/TA2OUT/KI0 P53/TA1IN P52/TA1OUT P51/TA0IN P50/TA0OUT P47 P46 P45 P44 P43 P42/1 P41/RDY
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Outline 80P6N-A
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
External data bus width Reference voltage input selection input VREF BYTE
Data Bus(Even) Data Bus(Odd)
Data Buffer DBH(8)
P0(8)
Data Buffer DBL(8)
Instruction Register(8)
Instruction Queue Buffer Q0(8) Instruction Queue Buffer Q1(8)
Address Bus
Incrementer(24)
(0V) AVSS
Program Address Register PA(24) Data Address Register DA(24)
Input/Output port P2 Input/Output port P8 Input/Output port P7 Input/Output port P6 Input/Output port P5 Input/Output port P4 Input/Output port P3 P2(8)
CNVss
Incrementer/Decrementer(24)
(0V) VSS
Program Bank Register PG(8) Data Bank Register DT(8)
UART2(9) UART1(9)
UART0(9)
VCC
Input Butter Register IB(16)
Watchdog Timer
Timer TB2(16)
Timer TB1(16)
Timer TB0(16)
Processor Status Register PS(11)
Reset input
RESET
Direct Page Register DPR(16)
Stack Pointer S(16)
Timer TA4(16)
Timer TA3(16)
M37733M4BXXXFP BLOCK DIAGRAM
Timer TA2(16)
Timer TA1(16)
Timer TA0(16)
Index Register Y(16)
XCOUT XCIN
Index Register X(16) Accumulator B(16)
Enable output
E
Accumulator A(16)
Clock Generating Circuit 2048 bytes P7(8)
Clock input Clock output XIN XOUT
RAM
Arithmetic Logic Unit(16)
XCOUT XCIN
32 Kbytes
2
ROM
P8(8)
P6(8)
P5(8)
P4(8)
P3(4)
Program Counter PC(16)
A-D Converter(10)
Input/Output port P1
Instruction Queue Buffer Q2(8)
P1(8)
AVCC
Input/Output port P0
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
FUNCTIONS OF M37733M4BXXXFP
Parameter Number of basic instructions Instruction execution time Memory size Input/Output ports Multi-function timers Serial I/O A-D converter Watchdog timer Interrupts Clock generating circuit Supply voltage Power dissipation Input/Output characteristic Memory expansion Operating temperature range Device structure Package Input/Output voltage Output current ROM RAM P0 - P2, P4 - P8 P3 TA0, TA1, TA2, TA3, TA4 TB0, TB1, TB2 Functions 103 160 ns (the fastest instruction at external clock 25 MHz frequency) 32 Kbytes 2048 bytes 8-bit 8 4-bit 1 16-bit 5 16-bit 3 (UART or clock synchronous serial I/O) 3 10-bit 1 (8 channels) 12-bit 1 3 external types, 16 internal types Each interrupt can be set to the priority level (0 - 7.) 2 circuits built-in (externally connected to a ceramic resonator or a quartz-crystal oscillator) 5 V 10% 47.5 mW (at external clock 25 MHz frequency) 5V 5 mA Maximum 16 Mbytes -20 to 85 C CMOS high-performance silicon gate process 80-pin plastic molded QFP (80P6N-A)
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
PIN DESCRIPTION
Pin Vcc, Vss CNVss
_____
Name Input/Output Power source Apply 5 V 10% to Vcc and 0 V to Vss. CNVss input Reset input Clock input Clock output Enable output Input Input Input Output Output Input
Functions
RESET
XIN
_
XOUT
E
External data bus width selection input AVcc, Analog power AVss source input Reference VREF voltage input P00 - P07 I/O port P0 BYTE
This pin controls the processor mode. Connect to Vss for the single-chip mode and the memory expansion mode, and to Vcc for the microprocessor mode. When "L" level is applied to this pin, the microcomputer enters the reset state. These are pins of main-clock generating circuit. Connect a ceramic resonator or a quartzcrystal oscillator between XIN and XOUT. When an external clock is used, the clock source should be connected to the XIN pin, and the XOUT pin should be left open. This pin functions as the enable signal output pin which indicates the access status in the internal _ bus. When output level of E signal is "L", data/instruction read or data write is performed. In the memory expansion mode or the microprocessor mode, this pin determines whether the external data bus has an 8-bit width or a 16-bit width. The data bus has a 16-bit width when "L" signal is input and an 8-bit width when "H" signal is input. Power source input pin for the A-D converter. Externally connect AVcc to Vcc and AVss to Vss. This is reference voltage input pin for the A-D converter. In the single-chip mode, port P0 becomes an 8-bit I/O port. An I/O direction register is available so that each pin can be programmed for input or output. These ports are in the input mode when reset. In the memory expansion mode or the microprocessor mode, these pins output address (A0 - A7). In the single-chip mode, these pins have the same functions as port P0. When the BYTE pin is set to "L" in the memory expansion mode or the microprocessor mode and external data bus has a 16-bit width, high-order data (D8 - D15) is input/output or an address (A8 - A15) is output. When the BYTE pin is "H" and an external data bus has an 8-bit width, only address (A8 - A15) is output. In the single-chip mode, these pins have the same functions as port P0. In the memory expansion mode or the microprocessor mode, low-order data (D0 - D7) is input/output or an address (A0 - A7) is output . In the single-chip mode, these pins have the same function as port P0. In the memory expansion ____ __ ___ mode or the microprocessor mode, R/W, BHE, ALE, and HLDA signals are output. In the single-chip mode, these pins have the same functions as port P0. In the memory expansion ____ ___ mode or the microprocessor mode, P40, P41 and P42 become HOLD and RDY input pins, and a clock 1 output pin, respectively. Functions of the other pins are the same as in the single-chip mode. However, in the memory expansion mode, P42 can be selected as an I/O port. In addition to having the same functions as port P0 in the single-chip mode, these pins also __ __ function as I/O pins for timers A0 to A3 and input pins for key input interrupt input (KI0 - KI3 ). In addition to having the same functions as port P0 in the single-chip mode, these pins also ___ ___ function as I/O pins for timer A4, input pins for external interrupt input (INT0 - INT2) and input pins for timers B0 to B2. P67 also functions as sub-clock SUB output pin. In addition to having the same functions as port P0 in the single-chip mode, these pins function as input pins for A-D converter. P72 to P75 also function as I/O pins for UART2. Additionally, P76 and P77 have the function as the output pin (XCOUT) and the input pin (XCIN) of the sub-clock (32 kHz) oscillation circuit, respectively. When P76 and P77 are used as the XCOUT and XCIN pins, connect a resonator or an oscillator between the both. In addition to having the same functions as port P0 in the single-chip mode, these pins also function as I/O pins for UART 0 and UART 1.
Input I/O
P10 - P17 I/O port P1
I/O
P20 - P27 I/O port P2
I/O
P30 - P33 I/O port P3 P40 - P47 I/O port P4
I/O I/O
P50 - P57 I/O port P5 P60 - P67 I/O port P6
I/O I/O
P70 - P77 I/O port P7
I/O
P80 - P87 I/O port P8
I/O
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
BASIC FUNCTION BLOCKS
The M37733M4BXXXFP has the same functions as the M37733MHBXXXFP except for the memory allocation and the ROM area modification function. Refer to the section on the M37733MHBXXXFP.
MEMORY
The memory map is shown in Figure 1. The address space has a capacity of 16 Mbytes and is allocated to addresses from 016 to FFFFFF16. The address space is divided by 64-Kbyte unit called bank. The banks are numbered from 016 to FF16. Built-in ROM, RAM and control registers for internal peripheral devices are assigned to bank 016. The 32-Kbyte area from addresses 800016 to FFFF16 is the built-in ROM. Addresses FFD616 to FFFF16 are the RESET and interrupt vector addresses and contain the interrupt vectors. Refer to the section on interrupts for details. The 2048-byte area allocated to addresses from 8016 to 87F16 is the built-in RAM. In addition to storing data, the RAM is used as stack during a subroutine call or interrupts.
Peripheral devices such as I/O ports, A-D converter, serial I/O, timer, and interrupt control registers are allocated to addresses from 016 to 7F16. Additionally, the internal ROM area can be modified by software. Refer to the section on ROM area modification function for details. A 256-byte direct page area can be allocated anywhere in bank 016 by using the direct page register (DPR). In the direct page addressing mode, the memory in the direct page area can be accessed with two words. Hence program steps can be reduced.
00000016 Bank 016
00000016 00007F16 00008016 00087F16
00000016 Internal RAM 2048 bytes Internal peripheral devices control registers
refer to Fig. 2 for detail information
00FFFF16 01000016
00007F16
Bank 116 00FFD616 01FFFF16
*******************
Interrupt vector table
A-D/UART2 trans./rece.
UART1 transmission UART1 receive UART0 transmission UART0 receive Timer B2
00800016
Timer B1 Timer B0 Timer A4 Timer A3 Timer A2
FE000016 Bank FE16 FEFFFF16 FF000016 Bank FF16 00FFD616 FFFFFF16 00FFFF16 00FFFE16 Internal ROM 32 Kbytes
Timer A1 Timer A0
INT2/Key input INT1 INT0
Watchdog timer
DBC
BRK instruction Zero divide
RESET
Note. Internal ROM area can be modified. (Refer to the section on ROM area modification function.)
Fig. 1 Memory map
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Address (Hexadecimal notation) 000000 000001 000002 Port P0 register 000003 Port P1 register 000004 Port P0 direction register 000005 Port P1 direction register 000006 Port P2 register 000007 Port P3 register 000008 Port P2 direction register 000009 Port P3 direction register 00000A Port P4 register 00000B Port P5 register 00000C Port P4 direction register 00000D Port P5 direction register 00000E Port P6 register 00000F Port P7 register 000010 Port P6 direction register 000011 Port P7 direction register 000012 Port P8 register 000013 000014 Port P8 direction register 000015 000016 000017 000018 000019 00001A 00001B 00001C Reserved area (Note) 00001D Reserved area (Note) 00001E A-D control register 0 00001F A-D control register 1 000020 A-D register 0 000021 000022 A-D register 1 000023 000024 A-D register 2 000025 000026 A-D register 3 000027 000028 A-D register 4 000029 00002A A-D register 5 00002B 00002C A-D register 6 00002D 00002E A-D register 7 00002F 000030 UART 0 transmit/receive mode register 000031 UART 0 baud rate register (BRG0) 000032 UART 0 transmission buffer register 000033 000034 UART 0 transmit/receive control register 0 000035 UART 0 transmit/receive control register 1 000036 UART 0 receive buffer register 000037 000038 UART 1 transmit/receive mode register 000039 UART 1 baud rate register (BRG1) 00003A UART 1 transmission buffer register 00003B 00003C UART 1 transmit/receive control register 0 00003D UART 1 transmit/receive control register 1 00003E UART 1 receive buffer register 00003F
Address (Hexadecimal notation) 000040 000041 000042 000043 000044 000045 000046 000047 000048 000049 00004A 00004B 00004C 00004D 00004E 00004F 000050 000051 000052 000053 000054 000055 000056 000057 000058 000059 00005A 00005B 00005C 00005D 00005E 00005F 000060 000061 000062 000063 000064 000065 000066 000067 000068 000069 00006A 00006B 00006C 00006D 00006E 00006F 000070 000071 000072 000073 000074 000075 000076 000077 000078 000079 00007A 00007B 00007C 00007D 00007E 00007F
Count start flag One-shot start flag Up-down flag
Timer A0 register Timer A1 register Timer A2 register Timer A3 register Timer A4 register Timer B0 register Timer B1 register Timer B2 register Timer A0 mode register Timer A1 mode register Timer A2 mode register Timer A3 mode register Timer A4 mode register Timer B0 mode register Timer B1 mode register Timer B2 mode register Processor mode register 0 Processor mode register 1 Watchdog timer register Watchdog timer frequency selection flag Reserved area (Note) Memory allocation control register UART 2 transmit/receive mode register UART 2 baud rate register (BRG2) UART 2 transmission buffer register UART 2 transmit/receive control register 0 UART 2 transmit/receive control register 1 UART 2 receive buffer register Oscillation circuit control register 0 Port function control register Serial transmit control register Oscillation circuit control register 1 A-D/UART 2 trans./rece. interrupt control register UART 0 transmission interrupt control register UART 0 receive interrupt control register UART 1 transmission interrupt control register UART 1 receive interrupt control register Timer A0 interrupt control register Timer A1 interrupt control register Timer A2 interrupt control register Timer A3 interrupt control register Timer A4 interrupt control register Timer B0 interrupt control register Timer B1 interrupt control register Timer B2 interrupt control register INT0 interrupt control register INT1 interrupt control register INT2/Key input interrupt control register Note. Do not write to this address.
Fig. 2 Location of internal peripheral devices and interrupt control registers
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
ROM AREA MODIFICATION FUNCTION
The internal ROM size and its address area of the M37733M4BXXXFP can be modified by the memory allocation control register's bit 0 shown in Figure 3. Figure 5 shows the memory allocation in which the internal ROM size and its address area are modified. Make sure to write data in the memory allocation control register as the flow shown in Figure 4. This ROM area modification function is valid in memory expansion mode and single-chip mode.
When ordering a mask ROM, Mitsubishi Electric corp. produces the mask ROM using the data within 32 Kbytes (addresses 00800016 - 00FFFF16). It is regardless of the selected ROM size (refer to MASK ROM ORDER CONFIRMATION FORM.) Therefore, program "FF16" to the addresses out of the selected ROM area in the EPROM which you tender when ordering a mask ROM. Address 00FFFF16 of this microcomputer corresponds to the lowest address of the EPROM which you tender.
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6
5
4
3
2
1
0 ML0 Memory allocation control register
Address 6316
Memory allocation selection bit ROM size (ROM area) 0 : 32 Kbytes (addresses 00800016 - 00FFFF16) 1 : 16 Kbytes (addresses 00C00016 - 00FFFF16)
Note. Write to the memory allocation control register as the flow shown in Figure 4.
Fig. 3 Bit configuration of memory allocation control register
Writing data "5516" (LDM instruction)
Next instruction
Writing data "0016" or "0116" (LDM instruction)
ML0 selection bit
* How to write in memory allocation control register
Fig. 4 How to write data in memory allocation control register
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(ML0) = (0) ROM size : 32 Kbytes 00000016 00007F16 00008016 00087F16 SFR Internal RAM 2048 bytes 00000016 00007F16 00008016 00087F16
(ML0) = (1) ROM size : 16 Kbytes SFR Internal RAM 2048 bytes
00800016 Internal ROM 32 Kbytes 00FFFF16 01000016
00C00016 00FFFF16 01000016
Internal ROM 16 Kbytes
FFFFFF16 : External memory area
FFFFFF16
Fig. 5 Memory allocation (modification of internal ROM area by memory allocation selection bit)
ADDRESSING MODES
The M37733M4BXXXFP has 28 powerful addressing modes. Refer to the SINGLE-CHIP 16-BIT MICROCOMPUTERS DATA BOOK for the details of each addressing mode.
MACHINE INSTRUCTION LIST
The M37733M4BXXXFP has 103 machine instructions. Refer to the SINGLE-CHIP 16-BIT MICROCOMPUTERS DATA BOOK for details.
DATA REQUIRED FOR MASK ROM ORDERING
Please send the following data for mask orders. (1) M37733M4BXXXFP mask ROM order confirmation form (2) 80P6N mark specification form (3) ROM data (EPROM 3 sets)
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
ABSOLUTE MAXIMUM RATINGS
Symbol Vcc AVcc VI VI Parameter Conditions Power source voltage Analog power source voltage _____ Input voltage RESET, CNVss, BYTE Input voltage P00 - P07, P10 - P17, P20 - P27, P30 - P33, P40 - P47, P50 - P57, P60 - P67, P70 - P77, P80 - P87, VREF, XIN Output voltage P00 - P07, P10 - P17, P20 - P27, P30 - P33, P40 - P47, P50 - P57, P60 - P67, P70 - P77, P80 - P87, _ XOUT, E Power dissipation Ta = 25 C Operating temperature Storage temperature Ratings -0.3 to +7 -0.3 to +7 -0.3 to +12 -0.3 to Vcc + 0.3 Unit V V V V
VO Pd Topr Tstg
-0.3 to Vcc + 0.3 300 -20 to +85 -40 to +150
V mW C C
RECOMMENDED OPERATING CONDITIONS (Vcc = 5 V 10%, Ta = -20 to +85 C, unless otherwise noted)
Symbol Vcc AVcc Vss AVss VIH VIH VIH VIL VIL VIL IOH(peak) Power source voltage Parameter f(XIN) : Operating f(XIN) : Stopped, f(XCIN) = 32.768 kHz Analog power source voltage Power source voltage Analog power source voltage High-level input voltage P00 - P07, P30 - P33, P40 - P47, P50 - P57, P60 - P67, _____ P70 - P77, P80 - P87, XIN, RESET, CNVss, BYTE, XCIN (Note 3) High-level input voltage P10 - P17, P20 - P27 (in single-chip mode) High-level input voltage P10 - P17, P20 - P27 (in memory expansion mode and microprocessor mode) Low-level input voltage P00 - P07, P30 - P33, P40 - P47, P50 - P57, P60 - P67, _____ P70 - P77, P80 - P87, XIN, RESET, CNVss, BYTE, XCIN (Note 3) Low-level input voltage P10 - P17, P20 - P27 (in single-chip mode) Low-level input voltage P10 - P17, P20 - P27 (in memory expansion mode and microprocessor mode) High-level peak output current P00 - P07, P10 - P17, P20 - P27, P30 - P33, P40 - P47, P50 - P57, P60 - P67, P70 - P77, P80 - P87 High-level average output current P00 - P07, P10 - P17, P20 - P27, P30 - P33, P40 - P47, P50 - P57, P60 - P67, P70 - P77, P80 - P87 Low-level peak output current P00 - P07, P10 - P17, P20 - P27, P30 - P33, P40 - P43, P54 - P57, P60 - P67, P70 - P77, P80 - P87 Low-level peak output current P44 - P47, P50 - P53 Low-level average output current P00 - P07, P10 - P17, P20 - P27, P30 - P33, P40 - P43, P54 - P57, P60 - P67, P70 - P77, P80 - P87 Low-level average output current P44 - P47, P50 - P53 Main-clock oscillation frequency (Note 4) Sub-clock oscillation frequency Min. 4.5 2.7 Limits Typ. 5.0 Vcc 0 0 0.8 Vcc 0.8 Vcc 0.5 Vcc 0 0 0 Vcc Vcc Vcc 0.2Vcc 0.2Vcc 0.16Vcc -10 Max. 5.5 5.5 Unit V V V V V V V V V V mA
IOH(avg)
-5
mA
IOL(peak) IOL(peak) IOL(avg) IOL(avg) f(XIN) f(XCIN)
10 20 5 15 25 50
mA mA mA mA MHz kHz
32.768
Notes 1. Average output current is the average value of a 100 ms interval. 2. The sum of IOL(peak) for ports P0, P1, P2, P3, and P8 must be 80 mA or less, the sum of IOH(peak) for ports P0, P1, P2, P3, and P8 must be 80 mA or less, the sum of IOL(peak) for ports P4, P5, P6, and P7 must be 100 mA or less, and the sum of IOH(peak) for ports P4, P5, P6, and P7 must be 80 mA or less. 3. Limits VIH and VIL for XCIN are applied when the sub clock external input selection bit = "1". 4. The maximum value of f(XIN) = 12.5 MHz when the main clock division selection bit = "1".
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
ELECTRICAL CHARACTERISTICS (Vcc = 5 V, Vss = 0 V, Ta = -20 to 85 C, f(XIN) = 25 MHz, unless otherwise noted)
Symbol VOH VOH VOH VOH VOL VOL VOL VOL VOL VT+ - VT- VT+ - VT- VT+ - VT- VT+ - VT- IIH Parameter Test conditions Min. 3 4.7 3.1 4.8 3.4 4.8 2 2 0.45 1.9 0.43 1.6 0.4 0.4 0.2 0.1 0.1 1 0.5 0.4 0.4 5 Limits Typ. Max. Unit V V V V V V V V V V V V V A High-level output voltage P00 - P07, P10 - P17, P20 - P27, P33, P40 - P47, P50 - P57, IOH = -10 mA P60 - P67, P70 - P77, P80 - P87 High-level output voltage P00 - P07, P10 - P17, P20 - P27, IOH = -400 A P33 IOH = -10 mA High-level output voltage P30 - P32 ICH = -400 A _ IOH = -10 mA High-level output voltage E IOH = -400 A Low-level output voltage P00 - P07, P10 - P17, P20 - P27, P33, P40 - P43, P54 - P57, IOL = 10 mA P60 - P67, P70 - P75, P80 - P87 Low-level output voltage P44 - P47, P50 - P53 IOL = 20 mA Low-level output voltage P00 - P07, P10 - P17, P20 - P27, IOL = 2 mA P33 IOL = 10 mA Low-level output voltage P30 - P32 IOL = 2 mA _ IOL = 10 mA Low-level output voltage E IOL = 2 mA ____ ___ Hysteresis HOLD, _______ _________ - TA4IN, TB0IN - TB2IN, RDY, TA0IN ________ ________ ________ _______ INT0 - INT2, ADTRG, CTS0, CTS1, CTS2, CLK0, _____ _____ CLK1, CLK2, KI0 - KI3 _____ Hysteresis RESET Hysteresis XIN Hysteresis XCIN (When external clock is input) High-level input current P00 - P07, P10 - P17, P20 - P27, P30 - P33, VI = 5 V - P57, P40 - P47, P50 _____P60 - P67, P70 - P77, P80 - P87, XIN, RESET, CNVss, BYTE Low-level input current P00 - P07, P10 - P17, P20 - P27, P30 - P33, VI = 0 V P61, P65 P40 - P47, P50 - P53, P60,_____ - P67, P70 - P77, P80 - P87, XIN, RESET, CNVss, BYTE VI = 0 V, Low-level input current P54 - P57, P62 - P64 RAM hold voltage
without a pull-up transistor
IIL
-5
A
-5 -0.25 2 -0.5 -1.0
A mA V
IIL VRAM
VI = 0 V, with a pull-up transistor When clock is stopped.
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
ELECTRICAL CHARACTERISTICS (Vcc = 5 V, Vss = 0 V, Ta = -20 to 85 C, unless otherwise noted)
Symbol Parameter Test conditions VCC = 5 V, f(XIN) = 25 MHz (square waveform), f(f2) = 12.5 MHz, f(XCIN) = 32.768 kHz, in operating (Note 1) VCC = 5 V, f(XIN) = 25 MHz (square waveform), (f(f2) = 1.5625 MHz), f(XCIN) = Stopped, in operating (Note 1) Power source current In single-chip mode, output pins are open, and other pins are VSS. VCC = 5V, f(XIN) = 25 MHz (square waveform), f(XCIN) = 32.768 kHz, when a WIT instruction is executed (Note 2) VCC = 5 V, f(XIN) : Stopped, f(XCIN) : 32.768 kHz, in operating (Note 3) Min. Limits Typ. Max. Unit
9.5
19
mA
1.3
2.6
mA
ICC
10
20
A
50
100
A
Notes 1. 2. 3. 4.
VCC = 5 V, f(XIN) : Stopped, 5 10 A f(XCIN) : 32.768 kHz, when a WIT instruction is executed (Note 4) Ta = 25 C, 1 A when clock is stopped Ta = 85 C, A 20 when clock is stopped This applies when the main clock external input selection bit = "1", the main clock division selection bit = "0", and the signal output stop bit = "1". This applies when the main clock external input selection bit = "1" and the system clock stop bit at wait state = "1". This applies when CPU and the clock timer are operating with the sub clock (32.768 kHz) selected as the system clock. This applies when the XCOUT drivability selection bit = "0" and the system clock stop bit at wait state = "1".
A-D CONVERTER CHARACTERISTICS
(VCC = AVCC = 5 V, VSS = AVSS = 0 V, Ta = -20 to 85 C, f(XIN) = 25 MHz (Note), unless otherwise noted) Symbol Parameter Test conditions Min. Limits Typ. Max. 10 3 25 VCC VREF Unit Bits LSB k s V V
-- Resolution VREF = VCC -- Absolute accuracy VREF = VCC RLADDER Ladder resistance VREF = VCC tCONV Conversion time VREF Reference voltage Analog input voltage VIA Note. This applies when the main clock division selection bit = "0" and f(f2) = 12.5 MHz.
10 9.44 2 0
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
TIMING REQUIREMENTS (VCC = 5 V 10%, VSS = 0 V, Ta = -20 to 85 C, f(XIN) = 25 MHz, unless otherwise noted (Note))
Notes 1. This applies when the main clock division selection bit = "0" and f(f2) = 12.5 MHz. 2. Input signal's rise/fall time must be 100 ns or less, unless otherwise noted.
External clock input
Unit Max. tc External clock input cycle time (Note 3) ns tw(H) External clock input high-level pulse width (Note 4) ns tw(L) External clock input low-level pulse width (Note 4) ns tr External clock rise time 8 ns External clock fall time 8 ns tf Notes 3. When the main clock division selection bit = "1", the minimum value of tc = 80 ns. 4. When the main clock division selection bit = "1", values of tw(H) / tc and tw(L) / tc must be set to values from 0.45 through 0.55. Min. 40 15 15 Symbol Parameter Limits
Single-chip mode
Symbol tsu(P0D-E) tsu(P1D-E) tsu(P2D-E) tsu(P3D-E) tsu(P4D-E) tsu(P5D-E) tsu(P6D-E) tsu(P7D-E) tsu(P8D-E) th(E-P0D) th(E-P1D) th(E-P2D) th(E-P3D) th(E-P4D) th(E-P5D) th(E-P6D) th(E-P7D) th(E-P8D) Port P0 input setup time Port P1 input setup time Port P2 input setup time Port P3 input setup time Port P4 input setup time Port P5 input setup time Port P6 input setup time Port P7 input setup time Port P8 input setup time Port P0 input hold time Port P1 input hold time Port P2 input hold time Port P3 input hold time Port P4 input hold time Port P5 input hold time Port P6 input hold time Port P7 input hold time Port P8 input hold time Parameter Limits Min. 60 60 60 60 60 60 60 60 60 0 0 0 0 0 0 0 0 0 Max. Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
Memory expansion mode and microprocessor mode
Symbol tsu(D-E) tsu(RDY-1) tsu(HOLD-1) th(E-D) th(1-RDY) th(1-HOLD) Data input setup time RDY input setup time HOLD input setup time Data input hold time ___ RDY input hold time ____ HOLD input hold time
___ ____
Parameter
Limits Min. 32 55 55 0 0 0 Max.
Unit ns ns ns ns ns ns
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Timer A input
Symbol tc(TA) tw(TAH) tw(TAL)
(Count input in event counter mode) parameter Limits Min. 80 40 40 Max. Unit ns ns ns
TAiIN input cycle time TAiIN input high-level pulse width TAiIN input low-level pulse width
Timer A input (Gating input in timer mode)
Symbol tc(TA) tw(TAH) tw(TAL) TAiIN input cycle time (Note) TAiIN input high-level pulse width (Note) TAiIN input low-level pulse width (Note) parameter Limits Min. 320 160 160 Max. Unit ns ns ns
Note. Limits change depending on f(XIN). Refer to "DATA FORMULAS".
Timer A input (External trigger input in one-shot pulse mode)
Symbol tc(TA) tw(TAH) tw(TAL) TAiIN input cycle time (Note) TAiIN input high-level pulse width TAiIN input low-level pulse width parameter Limits Min. 320 80 80 Max. Unit ns ns ns
Note. Limits change depending on f(XIN). Refer to "DATA FORMULAS".
Timer A input (External trigger input in pulse width modulation mode)
Symbol tw(TAH) tw(TAL) TAiIN input high-level pulse width TAiIN input low-level pulse width parameter Limits Min. 80 80 Max. Unit ns ns
Timer A input (Up-down input in event counter mode)
Symbol tc(UP) tw(UPH) tw(UPL) tsu(UP-TIN) th(TIN-UP) TAiOUT input cycle time TAiOUT input high-level pulse width TAiOUT input low-level pulse width TAiOUT input setup time TAiOUT input hold time parameter Limits Min. 2000 1000 1000 400 400 Max. Unit ns ns ns ns ns
Timer A input (Two-phase pulse input in event counter mode)
Symbol tc(TA) TAjIN input cycle time tsu(TAjIN-TAjOUT) TAjIN input setup time tsu(TAjOUT-TAjIN) TAjOUT input setup time parameter Limits Min. 800 200 200 Max. Unit ns ns ns
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Timer B input (Count input in event counter mode)
Symbol tc(TB) tw(TBH) tw(TBL) tc(TB) tw(TBH) tw(TBL) Parameter TBiIN input cycle time (one edge count) TBiIN input high-level pulse width (one edge count) TBiIN input low-level pulse width (one edge count) TBiIN input cycle time (both edges count) TBiIN input high-level pulse width (both edges count) TBiIN input low-level pulse width (both edges count) Limits Min. 80 40 40 160 80 80 Max. Unit ns ns ns ns ns ns
Timer B input (Pulse period measurement mode)
Symbol tc(TB) tw(TBH) tw(TBL) TBiIN input cycle time (Note) TBiIN input high-level pulse width (Note) TBiIN input low-level pulse width (Note) Parameter Limits Min. 320 160 160 Max. Unit ns ns ns
Note. Limits change depending on f(XIN). Refer to "DATA FORMULAS".
Timer B input (Pulse width measurement mode)
Symbol tc(TB) tw(TBH) tw(TBL) TBiIN input cycle time (Note) TBiIN input high-level pulse width (Note) TBiIN input low-level pulse width (Note) Parameter Limits Min. 320 160 160 Max. Unit ns ns ns
Note. Limits change depending on f(XIN). Refer to "DATA FORMULAS".
A-D trigger input
Symbol
____
Parameter
ADTRG input cycle time (minimum allowable trigger) ____ ADTRG input low-level pulse width
Limits Min. 1000 125 Max.
Unit ns ns
tc(AD) tw(ADL)
Serial I/O
Symbol tc(CK) tw(CKH) tw(CKL) td(C-Q) th(C-Q) tsu(D-C) th(C-D) CLKi input cycle time CLKi input high-level pulse width CLKi input low-level pulse width TXDi output delay time TXDi hold time RXDi input setup time RXDi input hold time
____ ___
Parameter
Limits Min. 200 100 100 0 30 90 Max.
Unit ns ns ns ns ns ns ns
80
External interrupt INTi input, key input interrupt KIi input
Symbol
___
Parameter
___ __
Limits Min. 250 250 250 Max.
Unit ns ns ns
tw(INH) tw(INL) tw(KIL)
INTi input high-level pulse width INTi input low-level pulse width KIi input low-level pulse width
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
DATA FORMULAS Timer A input (Gating input in timer mode)
Symbol tc(TA) tw(TAH) tw(TAL) TAiIN input cycle time TAiIN input high-level pulse width TAiIN input low-level pulse width Parameter Limits Min. 8 ! 109 2 * f(f2) 4 ! 109 2 * f(f2) 4 ! 109 2 * f(f2) Max. Unit ns ns ns
Timer A input (External trigger input in one-shot pulse mode)
Symbol tc(TA) TAiIN input cycle time Parameter Limits Min. 8 ! 109 2 * f(f2) Max. Unit ns
Timer B input (In pulse period measurement mode or pulse width measurement mode)
Symbol tc(TB) tw(TBH) tw(TBL) TBiIN input cycle time TBiIN input high-level pulse width TBiIN input low-level pulse width Parameter Limits Min. 8 ! 109 2 * f(f2) 4 ! 109 2 * f(f2) 4 ! 109 2 * f(f2) Max. Unit ns ns ns
Note. f(f2) represents the clock f2 frequency. For the relation to the main clock and sub clock, refer to Table 9 in data sheet "M37733MHBXXXFP".
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
SWITCHING CHARACTERISTICS (VCC = 5 V 10%, VSS = 0 V, Ta = -20 to 85C, f(XIN) = 25 MHz (Note), unless otherwise noted)
Symbol Parameter Test conditions Limits Min. Max. 80 80 80 80 80 80 80 80 80 Unit ns ns ns ns ns ns ns ns ns
td(E-P0Q) Port P0 data output delay time td(E-P1Q) Port P1 data output delay time td(E-P2Q) Port P2 data output delay time td(E-P3Q) Port P3 data output delay time Fig. 6 td(E-P4Q) Port P4 data output delay time td(E-P5Q) Port P5 data output delay time td(E-P6Q) Port P6 data output delay time td(E-P7Q) Port P7 data output delay time Port P8 data output delay time td(E-P8Q) Note. This applies when the main clock division selection bit = "0" and f(f2) = 12.5 MHz.
P0 P1 P2 P3 P4 P5 P6 P7 P8 1
E
50 pF
Fig. 6 Measuring circuit for ports P0 - P8 and 1
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Memory expansion mode and microprocessor mode
(VCC = 5 V 10%, VSS = 0 V, Ta = 25 C, f(XIN) = 25 MHz (Note 1), unless otherwise noted) Symbol td(An-E) Address output delay time Parameter Test (Note 2) Wait mode conditions No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 Limits Min. 12 87 12 75 18 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 22 57 5 45 9 15 Fig. 6 4 10 45 No wait Wait 1 Wait 0 18 50 130 5 20 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 12 87 12 87 18 18 0 Max. Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
td(A-E)
Address output delay time Address hold time ALE pulse width
th(E-An) tw(ALE)
tsu(A-ALE)
Address output set up time
th(ALE-A)
Address hold time
td(ALE-E) td(E-DQ) th(E-DQ) tw(EL) tpxz(E-DZ) tpzx(E-DZ) td(BHE-E)
ALE output delay time Data output delay time Data hold delay time
_
E pulse width
Floating start delay time Floating release delay time
___
BHE output delay time
td(R/W-E) th(E-BHE) th(E-R/W) td(E-1) td(1-HLDA)
_
R/ W output delay time
___
____
1 output delay time
HLDA output delay time
BHE hold time _ R/ W hold time
18 50
Notes 1. This applies when the main clock division selection bit = "0" and f(f2) = 12.5 MHz. 2. No wait : Wait bit = "1". Wait 1 : The external memory area is accessed with wait bit = "0" and wait selection bit = "1". Wait 0 : The external memory area is accessed with wait bit = "0" and wait selection bit = "0".
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Memory expansion mode and microprocessor mode Bus timing data formulas (VCC = 5 V 10%, VSS = 0 V, Ta = -20 to 85 C,
Symbol Parameter f(XIN) = 25 MHz (Max., Note), unless otherwise noted) Limits Min. 1 ! 109 - 28 2 * f(f2) 3 ! 109 - 33 2 * f(f2) 1 ! 109 - 28 2 * f(f2) 3 ! 109 - 45 2 * f(f2) 9 1 ! 10 - 22 2 * f(f2) 9 1 ! 10 - 18 2 * f(f2) 9 2 ! 10 - 23 2 * f(f2) 9 1 ! 10 - 35 2 * f(f2) 9 2 ! 10 - 35 2 * f(f2) 9 1 ! 109 2 * f(f2) 4 1 ! 109 2 * f(f2) 1 ! 109 2 * f(f2) 2 ! 109 2 * f(f2) 4 ! 109 2 * f(f2) 1 ! 109 2 * f(f2) 1 ! 109 2 * f(f2) 3 ! 109 2 * f(f2) 1 ! 109 2 * f(f2) 3 ! 109 2 * f(f2) 1 ! 109 2 * f(XIN) 1 ! 109 2 * f(XIN) 0 - 30 45 - 22 - 30 - 30 5 - 20 - 28 - 33 - 28 - 33 - 22 - 22 18 - 25 Max. Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
td(An-E)
Address output delay time
Wait mode No wait Wait 1 Wait 0 No wait Wait 1 Wait 0
td(A-E)
Address output delay time
th(E-An)
Address hold time No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0
tw(ALE)
ALE pulse width
tsu(A-ALE)
Address output set up time
th(ALE-A)
Address hold time
td(ALE-E) td(E-DQ) th(E-DQ)
ALE output delay time
Data output delay time Data hold time
_
No wait Wait 1 Wait 0
tw(EL) tpxz(E-DZ) tpzx(E-DZ)
E pulse width
Floating start delay time Floating release delay time
___
td(BHE-E)
BHE output delay time
No wait Wait 1 Wait 0
_
td(R/W-E)
R/W output delay time
___
No wait Wait 1 Wait 0
th(E-BHE) th(E-R/W) td(E-1)
BHE hold time
_
R/W hold time 1 output delay time
Notes 1. This applies when the main-clock division selection bit = "0". 2. f(f2) represents the clock f2 frequency. For the relation to the main clock and sub clock, refer to Table 9 in data sheet "M37733MHBXXXFP".
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
TIMING DIAGRAM
tr tf tc
Single-chip mode
XIN
tw(H)
tw(L)
E
td(E-P0Q)
Port P0 output
tsu(P0D-E)
Port P0 input
th(E-P0D)
td(E-P1Q)
Port P1 output
tsu(P1D-E)
Port P1 input
th(E-P1D)
td(E-P2Q)
Port P2 output
tsu(P2D-E)
Port P2 input
th(E-P2D)
td(E-P3Q)
Port P3 output
tsu(P3D-E)
Port P3 input
th(E-P3D)
td(E-P4Q)
Port P4 output
tsu(P4D-E)
Port P4 input
th(E-P4D)
td(E-P5Q)
Port P5 output
tsu(P5D-E)
Port P5 input
th(E-P5D)
td(E-P6Q)
Port P6 output
tsu(P6D-E)
Port P6 input
th(E-P6D)
td(E-P7Q)
Port P7 output
tsu(P7D-E)
Port P7 input
th(E-P7D)
td(E-P8Q)
Port P8 output
tsu(P8D-E)
Port P8 input
th(E-P8D)
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
tc(TA) tw(TAH) TAiIN input
tw(TAL)
tc(UP) tw(UPH) TAiOUT input tw(UPL)
In event count mode
TAiOUT input (Up-down input) TAiIN input (when count by falling) TAiIN input (when count by rising)
th(TIN-UP)
tsu(UP-TIN)
In event counter mode (When two-phase pulse input is selected) TAjIN input
tsu(TAjIN-TAjOUT)
tc(TA)
tsu(TAjIN-TAjOUT) tsu(TAjOUT-TAjIN)
TAjOUT input
tsu(TAjOUT-TAjIN)
tc(TB) tw(TBH) TBiIN input tw(TBL)
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
tc(AD) tw(ADL)
ADTRG input
tc(CK) tw(CKH) CLKi
tw(CKL)
th(C-Q) TxDi td(C-Q) RxDi tSU(D-C) th(C-D)
tw(INL)
INTi input Kli input
tw(INH) tw(KNL)
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Memory expansion mode and microprocessor mode (When wait bit = "1")
1
E
RDY input
tsu(RDY-1) th(1-RDY)
( When wait bit = "0")
1
E
RDY input
tsu(RDY-1) th(1-RDY)
(When wait bit = "1" or "0" in common)
1 tsu(HOLD-1)
HOLD input
th(1-HOLD)
td(1-HLDA)
HLDA output
td(1-HLDA)
Test conditions * VCC = 5 V 10% * Input timing voltage : V IL = 1.0 V, VIH = 4.0 V * Output timing voltage : V OL = 0.8 V, VOH = 2.0 V
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Memory expansion mode and microprocessor mode (No wait : When wait bit = "1")
tw(L)
tw(H)
tf
tr
tc
XIN
1
td(E-1) tw(EL) E td(E-1)
td(An-E)
th(E-An) Address Address Address
An
tw(ALE)
td(ALE-E)
ALE
th(ALE-A) tsu(A-ALE) th(E-DQ) tpxz(E-DZ) tpzx(E-DZ)
Am/Dm
Address
Data
Address th(E-D) tsu(D-E) Data
Address
td(E-DQ) td(A-E)
DmIN
th(E-BHE)
td(BHE-E) BHE
td(R/W-E)
th(E-R/W)
R/W
Test condition VCC = 5 V 10% Output timing voltage : VIL = 0.8 V, VIH = 2.0 V Data input DmIN : VIL = 0.8 V, VIH = 2.5 V
q q q
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Memory expansion mode and microprocessor mode (Wait 1 : The external area is accessed when wait bit = "0" and wait selection bit = "1".)
tw(L) XIN
tw(H)
tf tr
tc
1
td(E-1) tw(EL)
E
td(E-1)
td(An-E) An
th(E-An) Address Address
tw(ALE) ALE
td(ALE-E)
th(ALE-A) tsu(A-ALE) Am/Dm Address Data th(E-DQ) tpxz(E-DZ) Address tpzx(E-DZ) Address
td(A-E)
td(E-DQ) tsu(D-E)
th(E-D)
DmIN
Data td(BHE-E) th(E-BHE)
BHE
td(R/W-E) R/W
th(E-R/W)
Test condition * Vcc = 5 V 10% * Output timing voltage : V OL = 0.8 V, VOH = 2.0 V * Data input DmIN : VIL = 0.8 V, VIH = 2.5 V
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Memory expansion mode and microprocessor mode (Wait 0 : The external memory area is accessed when wait bit = "0" and wait selection bit = "0".)
tw(L) XIN
tw(H)
tf tr
tc
1
td(E-1)
E
td(E-1) tw(EL)
td(An-E) An Address
th(E-An) Address Address
tw(ALE) ALE
td(ALE-E)
tsu(A-ALE)
th(ALE-A) th(E-DQ) tpxz(E-DZ) Address tpzx(E-DZ) Address
Am/Dm
Address td(A-E)
Data td(E-DQ)
tsu(D-E) DmIN th(E-BHE) Data
th(E-D)
td(BHE-E)
BHE
td(R/W-E) R/W
th(E-R/W)
Test conditions * Vcc = 5 V 10% * Output timing voltage : V OL = 0.8 V, VOH = 2.0 V * Data input DmIN : VIL = 0.8 V, VIH = 2.5 V
25
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
PACKAGE OUTLINE
26
GZZ-SH00-76B<84A0> Mask ROM number
Note : Please fill in all items marked Issuance signatures Company name Date issued 1. Confirmation Specify the name of the product being ordered. Three sets of EPROMs are required for each pattern (Check @ in the appropriate box). If at least two of the three sets of EPROMs submitted contain the identical data, we will produce masks based on this data. We shall assume the responsibility for errors only if the mask ROM data on the products we produce differ from this data. Thus, the customer must be especially careful in verifying the data contained in the EPROMs submitted. Checksum code for entire EPROM areas EPROM Type : 27512 0000 0010 (1) Set "FF16" in the shaded area. (2) Address 016 to 1016 are the area for storing the data on model designation and options.This area must be written with the data shown below. Details for option data are given next in the section describing the STP instruction option. Address and data are written in hexadecimal notation. 8000 DATA FFFF 32K 4D 33 37 37 33 33 4D 34 Address 0 1 2 3 4 5 6 7 42 FF FF FF FF FF FF FF Address Address Option data 10 8 9 A B C D E F (hexadecimal notation) Date: TEL ( Responsible officer Supervisor
Customer
)
2. STP instruction option One of the following sets of data should be written to the option data address (1016) of the EPROM you have ordered. Check @ in the appropriate box. STP instruction enable STP instruction disable 0116 0016 Address 1016 Address 1016
3. Mark specification Mark specification must be submitted using the correct form for the type of package being ordered fill out the appropriate 80P6N Mark Specification Form (for M37733M4BXXXFP) and attach to the Mask ROM Order Confirmation Form. 4. Comments
Receipt
7700 FAMILY MASK ROM ORDER CONFIRMATION FORM SINGLE-CHIP 16-BIT MICROCOMPUTER M37733M4BXXXFP MITSUBISHI ELECTRIC
Date: Section head Supervisor signature signature
80P6N (80-PIN QFP) MARK SPECIFICATION FORM
Mitsubishi IC catalog name Please choose one of the marking types below (A, B, C), and enter the Mitsubishi IC catalog name and the special mark (if needed). A. Standard Mitsubishi Mark
64
41 40
65
Mitsubishi IC catalog name
Mitsubishi product number (6-digit, or 7-digit)
80 1 24
25
B. Customer's Parts Number + Mitsubishi IC Catalog Name
64
41 40
65
80 1 24
25
Customer's Parts Number Note : The fonts and size of characters are standard Mitsubishi type. Mitsubishi IC catalog name Notes 1 : The mark field should be written right aligned. 2 : The fonts and size of characters are standard Mitsubishi type. 3 : Customer's parts number can be up to 14 alphanumeric characters for capital letters, hyphens, commas, periods and so on.
C. Special Mark Required
64
41 40
65
80 1 24
25
Notes1 : If special mark is to be printed, indicate the desired layout of the mark in the left figure. The layout will be duplicated technically as close as possible. Mitsubishi product number (6-digit, or 7-digit) and Mask ROM number (3-digit) are always marked for sorting the products. 2 : If special character fonts (e,g., customer's trade mark logo) must be used in Special Mark, check the box below. For the new special character fonts, a clean font original (ideally logo drawing) must be submitted. Special character fonts required
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ge. ion. icat o chan t ecif l sp ubject fina re s a ot a is n limits This ric ice: aramet Not e p Som
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MITSUBISHI MICROCOMPUTERS
M37733M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Keep safety first in your circuit designs!
Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap.
Notes regarding these materials
These materials are intended as a reference to assist our customers in the selection of the Mitsubishi semiconductor product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Mitsubishi Electric Corporation or a third party. Mitsubishi Electric Corporation assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts or circuit application examples contained in these materials. All information contained in these materials, including product data, diagrams and charts, represent information on products at the time of publication of these materials, and are subject to change by Mitsubishi Electric Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for the latest product information before purchasing a product listed herein. Mitsubishi Electric Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. The prior written approval of Mitsubishi Electric Corporation is necessary to reprint or reproduce in whole or in part these materials. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for further details on these materials or the products contained therein.
(c) 1997 MITSUBISHI ELECTRIC CORP. H-LF482-A KI-9703 Printed in Japan (ROD) 2 New publication, effective Mar. 1997. Specifications subject to change without notice.
REVISION DESCRIPTION LIST
Rev. No. 1.0 1.01 First Edition The following are added: *MASK ROM ORDER CONFIRMATION FORM *MARK SPECIFICATION FORM
M37733M4BXXXFP DATA SHEET
Revision Description Rev. date 970604 980526
(1/1)

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